Aguirre, Fernando;
Sebastian, Abu;
Le Gallo, Manuel;
Song, Wenhao;
Wang, Tong;
Yang, J Joshua;
Lu, Wei;
... Lanza, Mario; + view all
(2024)
Hardware implementation of memristor-based artificial neural networks.
Nature Communications
, 15
, Article 1974. 10.1038/s41467-024-45670-9.
Preview |
Text
s41467-024-45670-9.pdf - Published Version Download (11MB) | Preview |
Abstract
Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach.
Type: | Article |
---|---|
Title: | Hardware implementation of memristor-based artificial neural networks |
Location: | England |
Open access status: | An open access version is available from UCL Discovery |
DOI: | 10.1038/s41467-024-45670-9 |
Publisher version: | https://doi.org/10.1038/s41467-024-45670-9 |
Language: | English |
Additional information: | This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/. |
Keywords: | Electrical and electronic engineering, Electronic devices |
UCL classification: | UCL UCL > Provost and Vice Provost Offices > UCL BEAMS UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng |
URI: | https://discovery.ucl.ac.uk/id/eprint/10188620 |



1. | ![]() | 18 |
2. | ![]() | 9 |
3. | ![]() | 5 |
4. | ![]() | 3 |
5. | ![]() | 3 |
6. | ![]() | 2 |
7. | ![]() | 1 |
8. | ![]() | 1 |
9. | ![]() | 1 |
10. | ![]() | 1 |
Archive Staff Only
![]() |
View Item |