Onno, AL;
Tang, M;
Oberbeck, L;
Wu, J;
Liu, H;
(2017)
External Quantum Efficiency modeling of GaAs solar cells grown on Si: a method to assess the Threading Dislocation Density.
In:
Proceedings of 33rd European Photovoltaic Solar Energy Conference and Exhibition.
WIP: München, Germany.
(In press).
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Abstract
A method is reported in order to determine an upper bound for the Threading Dislocation (TD) density in experimental GaAs solar cells grown lattice-mismatched on Si. The method is based on the modeling of the devices’ External Quantum Efficiency (EQE), using the classic drift-diffusion model, or Hovel model. The model is fitted to experimental EQE measurements, using the diffusion length of minority carriers as the sole fitting parameter. Assuming low surface recombination velocities at both interfaces, a lower bound for the diffusion length of minority carriers is determined. Considering non-radiative recombinations on TDs as the dominant recombination pathway, this lower bound for the diffusion length of minority carriers can be converted to an upper bound for the TD density, using the NTT model. This method is then used to assess the TD density in GaAs solar cells grown on Si by Molecular Beam Epitaxy, using Strained Layer Superlattice (SLS) Dislocation Filter Layers (DFLs) coupled with Thermal Cycle Annealing (TCA) steps in order to reduce the TD density in the active region of the devices. Upper bounds for the TD densities in the low 10^{7}cm^{-2} are thus extracted from the devices’ experimental EQE measurements.
| Type: | Proceedings paper |
|---|---|
| Title: | External Quantum Efficiency modeling of GaAs solar cells grown on Si: a method to assess the Threading Dislocation Density |
| Event: | 33rd European Photovoltaic Solar Energy Conference and Exhibition |
| Location: | Amsterdam, The Netherlands |
| Dates: | 25 September 2017 - 29 September 2017 |
| Open access status: | An open access version is available from UCL Discovery |
| Publisher version: | https://www.photovoltaic-conference.com/images/New... |
| Language: | English |
| Additional information: | This version is the author accepted manuscript. For information on re-use, please refer to the publisher’s terms and conditions. |
| Keywords: | Dislocation, Modeling, III-V Semiconductors, c-Si, Epitaxy |
| UCL classification: | UCL UCL > Provost and Vice Provost Offices UCL > Provost and Vice Provost Offices > UCL BEAMS UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng |
| URI: | https://discovery.ucl.ac.uk/id/eprint/10034035 |
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