Dang, Manyu;
Deng, Huiwen;
Huo, Suguo;
Juluri, Raghavendra;
Sanchez, Ana M;
Seeds, Alwyn;
Liu, Huiyun;
(2023)
The growth of low-threading-dislocation-density GaAs buffer layers on Si substrates.
Journal of Physics D: Applied Physics
, 56
(40)
, Article 405108. 10.1088/1361-6463/ace36d.
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Abstract
Monolithic integration of III-V optoelectronic devices on Si platform is gaining momentum, since it enables advantages of low cost, less complexity and high yield for mass production. With the aim of achieving advances in monolthic integration, the challenges associated with lattice mismatch between III-V layers and Si substrates must be overcome, as a low density of threading dislocations is a prerequisite for the robustness of the integrated devices. In this paper, we have investigated and compare different tyeps of dislocation filter layers (DFLs) from InGaAs asymmetric step-graded buffer layer (ASG), InGaAs/GaAs strained-layer superlattices, and quaternary alloy InAlGaAs ASG, on the functionlity of reducing threading dislocation density (TDD) for GaAs buffer layers on Si. Compared to other DFLs, the sample with InAlGaAs ASG buffer layer shows the lowest average TDD value and roughness, while the deccrease of TDD in the sample with InAlGaAs ASG buffer layer can be understood in terms of the hardening agent role of aluminium in the InAlGaAs ASG. By further optimising the InAlGaAs ASG through thermal cyclic annealing, we successfully demonstrate a low surface TDD of 6.3±0.1×106 /cm2 for a 2 µm GaAs/InAlGaAs ASG buffer layer grown on Si. These results could provide a thin buffer design for monolthic integration of various III-V devices on Si substrates.
| Type: | Article |
|---|---|
| Title: | The growth of low-threading-dislocation-density GaAs buffer layers on Si substrates |
| Open access status: | An open access version is available from UCL Discovery |
| DOI: | 10.1088/1361-6463/ace36d |
| Publisher version: | https://doi.org/10.1088/1361-6463/ace36d |
| Language: | English |
| Additional information: | Original content from this work may be used under the terms of the Creative Commons Attribution 4.0 license. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI. |
| Keywords: | Threading dislocation, heteroepitaxy, silicon photonics |
| UCL classification: | UCL UCL > Provost and Vice Provost Offices > UCL BEAMS UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng |
| URI: | https://discovery.ucl.ac.uk/id/eprint/10173316 |
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