UCL Discovery
UCL home » Library Services » Electronic resources » UCL Discovery

Heteroepitaxial Growth of III-V Semiconductors on Silicon

Park, J-S; Tang, M; Chen, S; Liu, H; (2020) Heteroepitaxial Growth of III-V Semiconductors on Silicon. Crystals , 10 (12) , Article 1163. 10.3390/cryst10121163. Green open access

[thumbnail of crystals-10-01163.pdf]
crystals-10-01163.pdf - Published Version

Download (9MB) | Preview


Monolithic integration of III-V semiconductor devices on Silicon (Si) has long been of great interest in photonic integrated circuits (PICs), as well as traditional integrated circuits (ICs), since it provides enormous potential benefits, including versatile functionality, low-cost, large-area production, and dense integration. However, the material dissimilarity between III-V and Si, such as lattice constant, coefficient of thermal expansion, and polarity, introduces a high density of various defects during the growth of III-V on Si. In order to tackle these issues, a variety of growth techniques have been developed so far, leading to the demonstration of high-quality III-V materials and optoelectronic devices monolithically grown on various Si-based platform. In this paper, the recent advances in the heteroepitaxial growth of III-V on Si substrates, particularly GaAs and InP, are discussed. After introducing the fundamental and technical challenges for III-V-on-Si heteroepitaxy, we discuss recent approaches for resolving growth issues and future direction towards monolithic integration of III-V on Si platform.

Type: Article
Title: Heteroepitaxial Growth of III-V Semiconductors on Silicon
Open access status: An open access version is available from UCL Discovery
DOI: 10.3390/cryst10121163
Publisher version: https://doi.org/10.3390/cryst10121163
Language: English
Additional information: This is an open access article distributed under the Creative Commons Attribution License (https://creativecommons.org/licenses/by/4.0/) which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Keywords: heteroepitaxy; monolithic integration; III-V on Si; integrated circuits (ICs); photonics integrated circuits (PICs); antiphase boundary; threading dislocation; thermal crack
UCL classification: UCL
UCL > Provost and Vice Provost Offices > UCL BEAMS
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng
URI: https://discovery.ucl.ac.uk/id/eprint/10119509
Downloads since deposit
Download activity - last month
Download activity - last 12 months
Downloads by country - last 12 months

Archive Staff Only

View Item View Item