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Characterisation and modelling of the cold biased FET and its use in low distortion circuit design

Hutabarat, Mervin Tangguar; (2000) Characterisation and modelling of the cold biased FET and its use in low distortion circuit design. Doctoral thesis (Ph.D.), University College London (United Kingdom). Green open access

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Abstract

This thesis presents work on the development of low distortion circuits using cold biassed FETs for use in communication systems. We present a nonlinearity characterisation technique for the cold biased FET for use in the design and analysis of linear and nonlinear circuits. It achieves a residual 3rd order intermodulation distortion (IMD3) of -116 dBm at -17 dBm/tone input. This set-up is invaluable for FET model assesment. Nonliearity characterisation set-ups for attenuators and resistive FET mixers built using a similar technique give fundamental/IMD3 of 82 and 78 dB respectively at 11 dBm/tone input. We identify a derivative discontinuity problem in large signal MESFET I-V models at zero drain bias leading to unrealistic distortion performance simulation in both Volterra series and time domain analyses. A modified version of the Parker Skellern model overcoming this problem is presented. This model is also capable of predicting the variation of the pinch-off modulation around zero drain bias. Analyses of the T, T- and bridged-T attenuator topologies identify that the T-attenuator provides high attenuation and 50 [omega] match in smaller chip area which makes it suitable for low distortion design. A nonlinearity reduction technique for FET variable resistors uses series FETs and bypass capacitors. Measurements of fabricated standard and low distortion monolithic microwave integrated circuit samples show that the nonlinearity reduction technique improves the second and third order input referred intermodulation intercept point of the standard T-attenuator by 20 and 10 dB in respectively and the IdB compression point between 3 dB and 10 dB (at minimum attenuation value). An on-wafer distortion measurement set-up for resistive FET mixers is presented. Measured data confirms that gate bias slightly above the pinch-off voltage provides the best match and conversion loss. The measurements indicate that HEMTs offer lower conversion loss than MESFETs with comparable IIP3.

Type: Thesis (Doctoral)
Qualification: Ph.D.
Title: Characterisation and modelling of the cold biased FET and its use in low distortion circuit design
Open access status: An open access version is available from UCL Discovery
Language: English
Additional information: Thesis digitised by ProQuest.
Keywords: (UMI)AAIU642815; Applied sciences; Linear circuits; Nonlinear circuits
URI: https://discovery.ucl.ac.uk/id/eprint/10100784
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