Momoh, J; Bhattarai, S; Ziebart, M; (2019) Receiver clock jump and cycle slip correction algorithm for single-frequency GNSS receivers. GPS Solutions , 23 , Article 38. 10.1007/s10291-019-0832-4.

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Abstract

We introduce a simple single-band receiver clock jump and cycle slip (CJCS) detection and correction algorithm suitable for a standalone single-frequency Global Navigation Satellite System (GNSS) receiver. The real-time algorithm involves using an adaptive time differencing technique for the generation of adaptive difference sequences of single-frequency code and phase observations. The sequences are used for determining thresholds and for the detection and determination of a receiver clock jump and cycle slips. The cycle slip values are fixed by rounding-up float values obtained via weighted least squares adjustment, following the elimination of the receiver’s high-order clock drift at every epoch. The performance of this new technique was investigated with simulated cycle slip values and with different types of receiver clock jumps at millisecond and microsecond levels. It achieved 100% detection and correction of all types of receiver clock jumps; between 97 and 100% cycle slip detection; and between 96.9 and 100% cycle slip correction including cycle slips of ± 1 cycle, for different rates of observations acquired by different fixed and mobile GNSS receivers. The algorithm thus facilitates precise timing and positioning on standalone low-cost single-frequency GNSS devices.

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