On-Probe Neural Interface ASIC for Combined Electrical Recording and Optogenetic Stimulation

Neuromodulation technologies are progressing from pacemaking and sensory operations to full closed-loop control. In particular, optogenetics—the genetic modification of light sensitivity into neural tissue allows for simultaneous optical stimulation and electronic recording. This paper presents a neural interface application-specified integrated circuit (ASIC) for intelligent optoelectronic probes. The architecture is designed to enable simultaneous optical neural stimulation and electronic recording. It provides four low noise (2.08 <italic> μ</italic>V<inline-formula><tex-math notation="LaTeX">$_{\text{rms}}$</tex-math></inline-formula>) recording channels optimized for recording local field potentials (LFPs) (0.1–300 Hz bandwidth, <inline-formula> <tex-math notation="LaTeX">$\pm$</tex-math></inline-formula> 5 mV range, sampled 10-bit@4 kHz), which are more stable for chronic applications. For stimulation, it provides six independently addressable optical driver circuits, which can provide both intensity (8-bit resolution across a 1.1 mA range) and pulse-width modulation for high-radiance light emitting diodes (LEDs). The system includes a fully digital interface using a serial peripheral interface (SPI) protocol to allow for use with embedded controllers. The SPI interface is embedded within a finite state machine (FSM), which implements a command interpreter that can send out LFP data whilst receiving instructions to control LED emission. The circuit has been implemented in a commercially available 0.35 <italic> μ</italic>m CMOS technology occupying a 1.95 mm <inline-formula><tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 1.10 mm footprint for mounting onto the head of a silicon probe. Measured results are given for a variety of bench-top, <italic>in vitro</italic> and <italic>in vivo</italic> experiments, quantifying system performance and also demonstrating concurrent recording and stimulation within relevant experimental models.


I. INTRODUCTION
N EUROPROSTHETIC technologies have been steadily im- proving over the decades.In the 1990's deep brain stimulus (DBS) technologies became available with implantable control systems which provided therapeutic modulation [1].In tandem, cortical devices such as the Utah array [2] began to provide recording and stimulus of the cortical regions In recent years, there is a strong push to advance the field towards closed loop systems.Examples include systems which monitor brain activity of epileptic patients and intervene in the case of seizure [3].
A key advance in this drive towards closed loop systems has been optogenetics -the genetic modification of light sensitivity into nervous tissue.This can be achieved by genetically expressing Channelrhodopsin-2 photosensitive ion-channels [7] (or variants thereof) onto the membranes of neurons.There are two key advantages with this approach: The first is that optical stimulus will not interfere with electrical recordings.In contrast, there is a strong stimulus artefact in electronic systems.This can be important for real-time closed loop requirements such as for epilepsy.The second is that through genetic manipulation, it is possible to target specific cells in specific neural sub-circuits [8].Furthermore, it allows for simultaneous optical stimulation and electrical recording.The medical frontier for this technique is to use it to treat neurological conditions such as Epilepsy, Parkinson's disease or Depression [9]- [11] or provide improved sensory prosthetics such as visual [12].At the time of writing, the first human trials of optogenetic retinal prosthesis by an independent team have been underway for one year (since 2016).However, clinical results have not yet been published.
The primary issue for optoelectronic approaches to prosthetics is that visible light, and in particular, blue light scatters strongly in neural tissue [13]- [15].Thus, in order to stimulate deeper areas of the brain, light must be either guided in from afar, or generated locally.Some of the earliest optoelectronics systems have either used single light guiding fibres with deposited electrode materials [16], integrated optic fibres with Utah recording electrodes [17], or made arrays of penetrating optic fibres [18].The key issue with such approaches is that number of emitted light channels can be limited.Furthermore, subsequent optical emission is transverse through the cortical layer structures.Zorzos et al. [19] advanced on these designs by developing a probe with multiple light guiding structures.Emission was improved to a 45°angle.However, optical multiplexing and connectivity is very challenging.
The alternative to light guiding is to generate the light directly at the target site deep in the neural tissue.McAlinden et al. demonstrated an optical probe fabricated directly from an LED Gallium Nitride substrate [4].In tandem, Doroudchi et al. [5] and Cao et al. [6] have demonstrated silicon probes with bonded on mini (100 µm to 500 µm width/length dimensions) or micro scale (sub 100 µm dimensions) Light Emitting Diodes (LEDs).
A key advantage with this approach is that the light emission can be in parallel with the cortical layering, thus providing better control than with light guiding methods.
These solutions however, have needed to be driven via external electronics.This means that multiple stimulation and recording sites will require a large number of connective wires.This is highly undesirable for devices aiming for clinical translation.As such, a more scalable approach is to integrate intelligent multiplexing of signals onto the probe itself.
A number of highly integrated electronic probes with large numbers of electrical stimulation and recording sites have been previously described.For example, Shulyzki et al. [20] have demonstrated a chip which can be combined with existing 8 × 8 Utah style probes and up to 256 external recording pads.Furthermore, both Lopez et al. [21], and Angotzi et al. [22] have demonstrated probes fabricated from a CMOS base which incorporate respectively 455, and 512 recording electrodes.
Our interest in this work is therefore to develop an electronic control system, which can both drive high radiance µLEDs and perform electronic recording.To date, there is only one other example of this in the literature [23].In that work, the stimulator circuitry is designed primarily for laser control, and the electronic recording is designed for single unit (action potential) recordings.In our case, we propose an architecture designed for long term chronic use when integrated onto implantable probes.We have thus designed stimulator drivers to utilize high efficiency (∼30%) LEDs, which can achieve total system efficiencies in excess of 20%.This is important for both minimizing undesirable surface heating and ensuring low-power battery operation.Our design records local field potentials as these have proven to be most stable for long term chronic studies [24], [25].Our also design builds on our previous efforts in neural recording [26], [27] where we demonstrated analogue front-end for low-noise low-power neural recording.It also builds on or previous efforts in developing CMOS driven high radiance neural stimulators for retinal prosthetics [28], [29].
This paper describes a neural interface ASIC that records field potentials from electrode sites on the sides of a silicon probe, and facilitates optogenetic stimulation through driving µLEDs with a precise pulse output.This ASIC has been designed to be mounted to the head of a silicon probe (concept shown in Fig. 1).Overall system design joint with only preliminary simulation results of recording and stimulation subsystems were initially reported in [30].This paper discusses detailed system operation, circuit design, proposed form factor and in vitro test results.We envisage this form factor to be better suited to chronic studies in neuroscience, and towards developing a clinically relevant system.The motivation here is to develop a probe-head that can be hermetically sealed to a probe body.We would envisage such that internal electronics are fully protected from the tissue fluids.Vias in in the probe body would then allow connection to probe electrode and light emitter drive lines.We expect this to reduce implant corrosion by containing all DC voltages within the hermetic seal.We then also, implement a symmetric biphasic stimulus to minimize corrosion at the LED stimulation sites.
The system additionally has an onboard digital control system which utilizes a standard SPI for external communication with an embedded controller.
The remainder of this paper is organized as follows: Section II describes the concept for neural interfacing; Section III details the system architecture and circuit implementation; Section IV describes the device fabrication; Section V presents experimental results; and Section VI concludes this paper.

A. Observing Neural Activity
Neural activity can be observed extracellularly at single unit level using penetrating implantable electrodes, and electronics to amplify and sample this with sufficient bandwidth (typically 10-20 kHz).Although such technology has been the workhorse for most experimental neuroscientists over recent decades, observing this activity chronically has proven challenging.This is because of a number of reasons stemming from the fact that any silicon probe is essentially a 'foreign body', with different mechanical/material properties to the surrounding tissue, and the insertion will cause short term damage (rupturing Fig. 2. System architecture for the proposed neural interface ASIC.This supports 4 neural recording channels and 6 optical stimulation sites.The system utilizes a digital unit to facilitate the SPI communication in addition to controlling the recording and stimulation.The internal FSM interprets a custom instruction set which, an external processor can use to configure the system, fetch recorded signals and/or control optical stimulation.blood vessels, cutting through tissue), and longer term effects (foreign body response, gliosis/scar tissue growth, cell death).Furthermore, there could also be secondary effects due to the integrity of the probe itself (electrode damage, corrosion, mechanical failure during insertion, etc).These challenges are described in some detail in recent reviews by Chen et al. [31] and Szostak et al. [32].
There has recently been significant interest in instead utilizing local field potentials (LFPs) as the early evidence suggests these may be more resilient to the neural recordings 'fading' over time [33], [34].LFPs are primarily in the 1-100 Hz range, but high frequency oscillations can extend to hundreds of Hz.It has been shown however that even the lower frequency LFPs have useful information content [24], [25], [35], [36].
The work presented herein thus utilises low frequency LFPs for two reasons: firstly to exploit this 'improved' chronic stability (compared to single unit recordings); and second to allow for increased scalability -as these recordings require a lower data bandwidth, more channels are possible for a given power budget.Our ultimate aim is to develop devices capable of controlling the dynamics of neural populations, such as abnormal oscillations and or seizures.Such population dynamics is readily observed in the local field potential so we are focussing on this signal.

B. Optical Neuromodulation
Optical stimulation can be physically conducted using high efficiency light emitting diodes (LEDs).Gallium Nitride µLEDs implemented onto passive optrodes, have been described previously by McAlinden et al. [4], have demonstrated efficiencies of around 5%.We have recorded similar efficiencies in our past efforts with such devices [28], [29], [37].Mini LEDs can provide higher efficiencies as they can be driven at much lower current densities for the same amount of light.We have utilized CREE (DA2432), which provides up to 30% efficiency in the driving range required for optogenetic stimulation.Implementations of similar devices onto passive optrodes has previously been described by Doroudchi et al. [5] and Cao et al. [6].
Optogenetically encoded cells will integrate light over a period of milliseconds to tens of milliseconds which then modifies their baseline activity [38], [39].Thus, light can be either driven as a modulated intensity signal over time, or as a fixed intensity with pulse width modulation.I.e. it is the integral photon flux which will drive the response.The developed stimulation system provides both options either separately or in tandem.

III. SYSTEM IMPLEMENTATION
The overall system architecture of the neural interface ASIC is shown in Fig. 2.This has 3 key blocks: (a) digital controller for external communication, interpreting and executing commands; (b) neural recording system for amplifying, filtering, and digitizing biopotential signals; and (c) optical stimulation system for generating, timing and driving µLEDs to facilitate optogenetic neural stimulation.
The system has two power domains: 3.3 V (using native devices) and 5 V (using thick oxide devices).The 3.3 V is used for all circuits (digital, recording, stimulation control and generation) except the stimulation output stage.The 5 V supply is required to drive blue µLEDs.This type of LEDs are known to have considerably higher threshold voltage compared to conventional ones.Using 5 V supply, LEDs can be driven to produce a wide range of output light power.

A. Digital Control
The digital controller provides the following functions: (1) SPI communication interface with external processing and control units; (2) a finite state machine (FSM) with defined instructions which can control the µLED driving circuits, configure and control the acquisition of data from recording circuits.
The FSM has been designed to operate with minimum latency with respect to incoming SPI commands.This receives configuration, issues stimulation timing and control signals, and fetches  recording data upon request.This has been designed to be tightly integrated within the interacting sub-blocks.
All operations in the digital controller are synchronized to a master clock, except for the SPI transceiver, which uses the SPI clock MCLK.An external reset is used to provide a global reset of all internal states.
1) Serial Peripheral Interface (SPI): Both commands received (i.e., configuration and control) and transmitted output (i.e., recording) data are processed as either 8 or 16-bit packets on a SPI protocol.These packets have the LSB (least significant bit) first, rising edge data-in and falling edge data-out.The Master, i.e., external controller will assert an active low CS (chip select) before providing the SPI clock signal.The SPI slave, i.e., this system, will update the serial output MISO (master in slave out), and shift in the serial input MOSI (master out slave in) at the falling edge of the MCLK.On the 8th falling edge, the SPI slave will put D0 of the next SPI packet on MISO.A custom instruction set (listed in Table I) has been designed and implemented to allow the SPI master tight low-level control of the neural interface ASIC.Each command packet has an 8-bit length, with the first 4-bits specifying the instruction, and last 4-bits a parameter that is specific to each command.If the command is to Set LED value, an additional 8-bit parameter is required from the master, corresponding to the DAC value.This is illustrated in Fig. 3.

2) Finite State Machine:
The FSM controls all aspects of the operation of the neural interface ASIC, setting the state of both the stimulation and recording sub-systems, and responding to any inputs from the SPI interface.This has a total of 10 states: 8 that are directly related to instructions, one idle state and one error state.A valid SPI command described in the previous section will trigger the FSM to enter the corresponding state, and generate relevant control signals and/or set the SPI output data buffer.All states, and corresponding conditions are shown in Fig. 4.

B. Neural Recording
Each electrical recording sub-system will continuously observe LFP signals at that site.LFP signals can have amplitudes up to 5-10 mV, with a power spectrum predominantly below 100-200 Hz (down to sub-Hz).The LFP recording sub-system in the optrode includes four recording channels, a shared ADC and corresponding control logic.Each recording channel consists of a low noise Front-End Amplifier (FEA) to couple to electrode and provide low-noise amplification, and a 2nd gain stage for further amplification with relaxed noise requirements.The ADC is shared by multiple neural recording channels.Therefore, a buffer with sufficient drive strength is required to reduce the settling error and crosstalk between multiplexing.
1) Design Considerations for LFP Recording: In order to amplify low level (i.e., sub-millivolt) neural signals to fill the dynamic range of the ADC, a large voltage gain is required with minimal added noise.This can be achieved using a capacitive network that provides efficient feedback with good matching and power consumption.Multiple capacitive-coupled amplifiers can subsequently be cascaded to achieve the high gain without requiring a large (ratio) capacitor array and open loop gain [21], [27], such that noise of the following stage can be minimized when referred to the input.
Chopper-based FEAs can generally achieve better low frequency noise performance, however this is at the expense of a reduced input impedance, switched-capacitor induced thermal noise and requiring an extra clock source [40], [41].These are therefore mainly used in EEG (electroencephalogram) and ENG (electroneurogram) recording applications (that have relaxed requirements on input impedance).In implantable devices however that require LFP recording, any reduction in the input impedance of the front-end may lead to long term electrode degradation.Although recently there have been techniques proposed to boost the input impedance in such circuits, these require precise device matching and/or auto-zeroing techniques [42].Taking these factors into account, the design presented herein has used an AC-coupled approach that balances the area/power trade-off achieving an equivalent noise performance.[27] 2) Low Noise Front-End Amplifier (LN-FEA): The LN-FEA couples to the electrode (rejecting any DC offset) and amplifies the input signal with minimal added (electronic) noise.To ensure a sufficient signal-to-noise ratio (SNR) and thus to maximize the observed input signal, a large input impedance is required relative to the source (i.e., electrode) impedance (typically 10-100 kΩ).In this design, the FEA is based on the widely-used topology first proposed by Harrison [43], which a capacitive ratio to define the AC gain (i.e., capacitively coupled input with capacitive feedback).By using a relatively large input capacitance (≈3.4 pF), the input impedance over the 100 Hz signal bandwidth will be in the order of 100 MΩ, which is 3-4 orders of magnitude greater than a conventional electrode impedance.However, an electrode fabricated on-chip may exhibit a larger than anticipated input impedance (i.e., >100 kΩ).
The LN-FEA design is shown in Fig. 5(a).Pseudo-resistors are used to set the DC operating point at the input of the amplifier.Capacitive feedback is then used to define the gain (set to 50, i.e., 33 dB), with a unit capacitance of 150 fF.The amplifier uses a fully-differential folded-cascode operational transconductance amplifier (OTA) topology with resistive source degeneration for noise suppression [44].Input transistor size have been designed to minimize flicker noise without introducing large parasitic capacitance for noise.Deep triode transistor are used for continuous-time common-mode feedback (CMFB) circuit, with an PMOS to boost the tail current source impedance.Two pairs of pseudo-resistors (connected in series) are used to place the pole below 0.1 Hz, in order to remove electrode offset and any low frequency drift (i.e., at frequencies below 1 Hz).To compensate temperature variation and device mismatch, cascaded diode-connected PMOS pairs are used to increase the  resistance, such that the high pass pole is well beyond the signal bandwidth, and PVT induced variation has a minimal effect on signal integrity.The low-pass (LP) pole is defined at around 7 kHz, determined by the load capacitor (12 pF), which is realized using MOS-cap devices.
3) Programmable Gain Amplifier (PGA) Stage: As the gain of the FEA is only 50, i.e., 33 dB, a second gain stage is needed to amplify the LFP signal such that it fills the input range of the ADC.Therefore a 2nd stage gain of 6 is needed, to avoid saturating the supply voltage range.This is achieved by using a single-ended amplifier with capacitive feedback.This amplifier uses a fully-symmetrical OTA Harrison [43] with schematic shown in Fig. 5(b).The response of the first two gain stages is shown in Fig 6.

4) Analog-to-Digital Conversion (ADC):
The outputs from the four PGAs are fed into a 4:1 analog multiplexer, which is controlled by a select signal generated by the recording control block.It uses complementary switch pairs with size of 32 µm/0.35µm.To drive the relatively large capacitive load of the ADC input, a buffer stage is used after the multiplexer output.It uses symmetric OTA, similar to the PGA, but with increased current bias (2.5 µA) to boost the bandwidth and slew rate.The ADC used by our LFP recording is based on a 9:1 split array charge-redistribution fully differential SAR (successive approximation register) ADC with 10-bit resolution and 33 fF unit capacitance.The measured INL and DNL for the ADC is shown in Fig. 7.

5) LFP Streaming:
In order for LFP data to be received, the SPI master must first issue a read LFP data command.This requires three 8-bit data packets: one byte to set the state, and another two bytes to transmit the output data.The recording data requires 12-bits (consisting of a 2-bit channel index and 10-bit data sample), plus one additional bit to store the register index.Two 12-bit registers are required within the FSM to store the input value from LFP sub-system.These are selected alternately by the read and write processes.Once the read process is initiated through an SPI command, the first 8-bits are placed on the SPI bus, until they are read on the next rising edge.The remaining bits are then placed on the bus to subsequently be read.

C. Optical Stimulation
The proposed system allows for up to six optical stimulation sites that can be positioned along the length of the optrode shaft, delivering light to perform multi-layer neural stimulation.
The architecture has been designed for use with multiple different types of light emitting diode -both mini-LED and µLED.To exemplar this work, we have been utilizing a mini-LED from CREE DA2432.The LED-only performance for can be seen in Fig. 8.The CREE LED has dimensions of 320 × 240 µm, so the current density ranges from 0-65 mA/mm 2 (5 mA) compared to an excess of 15,000 mA/mm 2 for micro-LED devices of diameter 20 µm.As such the response profile of radiance vs current is largely linear in this range, with minimal droop profile.The efficiency peaks at ∼30% subsequent decay is due to increased drive voltage requirement.To compare with previous literature, both Wu et al. [45] and McAlinden et al. [4] developed passive probes with micro-LEDs.Wu et al. used LED currents of 45 µW to generate 8 µW of optical power and McAlinden et al. used currents of up to 5 mA to generate radiances of 600 µW.Both modeled the expected penetration depth into tissue for an irradiance of 1 mW/mm 2 .The former (45 µW) achieved 60 µm, whereas the latter (600 µW) achieved 175 µm of penetration.As such, we believe that LED drive currents in the region of 0-1 mA are sufficient to stimulate bulk neural tissue.This region is highlighted in yellow in Fig. 8 1) Stimulation Commands: The optical stimulation architecture is shown in Fig. 9. Intensity can here be controlled via both pulse width modulation and intensity control.The latter be achieved with an 8-bit value sent to the Set LED state.Pulse width modulation of ON and OFF states are achieved by programming the two memory cells.There is an additional Read LED state to return the value of the memory cell.Each memory cell is accessible by a unique address value.
2) H-Bridge: The simplest mode of operation would be to have a single PMOS transistor which varies in analog between fully ON and OFF.Intensity control can then be achieved with pulse width modulation.Grossman et al. [39] previously demonstrated that the most efficient way to drive optically encoded   neurons is via short high intensity pulses of light.However, at this stage, it may be also useful to modulate the intensity in analog -hence, we developed a circuit to implement both.An additional challenge for chronic use is to minimize undesirable net electric fields across exposed implantable components.We thus implemented an H-bridge configuration which allows for the voltage profile to be reversed thus generating a biphasic electric field.The different states of operation of the H-bridge are listed in Table II.
3) µLED Light Intensity Control: Intensity can be control via a voltage DAC which is then converted to a current via a transconductance amplifier shown in Fig. 9.The DAC has 8-bit resolution and a 0 to 3.3 V output range which provides a current range of 0-1.1 mA through the TCA and H-bridge.This will produce up to 0.8 mW optical stimulation at µLED.
The TCA is not an ideal current amplifier.A load line plot for the drive transistor and measured data from the LED can be seen in Fig. 10.For much of the curve, the resultant operation is in the triode region, which means it will also be limited by factors such as sheet resistance of the optrode lines and contact resistances during bonding.However, we would argue that it is The seal ring on the head section is essential to hermetically seal the electronics against any liquid percolation.[46] better to in triode region, as more of the drive voltage then drops across the LED resulting in an overall more power efficient operation.Device variability can be out by the stimulation time.

IV. PROBE INTEGRATION
The neural interface ASIC was fabricated in AMS 0.35 µm 2P4M CMOS technology (C35B4C3).The microphotograph of the die is shown at Fig. 11(a).The prototype occupies total area of 1.95 × 1.1 mm 2 .The die has been designed to then be flipchip bonded onto a passive optrode, similar to those previously described in the literature [4]- [6].

A. Passive Optrode
The microphotograph of the passive optrode designed in this work is shown at Fig. 11(b).This optrode was fabricated in the same technology as the ASIC.The head and the shank regions occupy 2.3 × 1.5 mm 2 and 2.73 × 0.28 mm 2 respectively.The shank contains pads to deposit 4 electrodes and 6 LEDs.The head region contains the pad arrangement to match ASIC layout when flip-chip bonding as well as connections to the components down the shank.The seal ring around the head region indicates the boarders, where the ASIC will be positioned.This ring is essential to isolate the ASIC from moisture when the device is implanted in tissue [46], [47], though we do not demonstrate this post-fabrication here.

B. Temperature Monitor
The literature on long term effects of hot probes on neural tissue is still unclear.However, the American Association of Medical Instrumentation (AAMI) recommend a limit of dT = +2 • C. i.e., any exposed surface to the tissue should be ≤39 • C. We propose the use of relatively efficient LEDs (∼30% at the LED).But nevertheless, the thermal limit is small, and thus it can be useful to monitor overheating.Should a sensor indicate that this is occurring, the LED pulse widths can be adapted accordingly.
Temperature can be monitored as a resistance change on surface resistors.We therefore implemented resistors as a spiral coil and placed in each gap between the anode and cathode pads for the LED, and is covered by the passivation layer without direct contact with LED.Metal tracks of 0.6 µm wide, total length of 3100 µm, was used as the sensing elements with equivalent resistance of 220 Ω.An amplification stage is used to output the temperature, shown in Fig. 12.
These temperature sensors were characterized without LEDs bonded in an ESPEC temperature chamber with temperature changing from 20 • C to 50 • C. The measured voltage output of two sensors show a sensitivity of 2 mV per degree, as seen in Fig. 12.It can be found that these temperature sensors exhibits large offset which varies from sensor to sensor.Thus there would need be a calibration step for each prior to use.There is also a further complication in that there will be a temperature difference between the location of the sensor and the surface.This would need a further calibration step as it will depend on the passivation layer properties and thickness.As such probe fabrication details go beyond the scope of this paper, we do not explore this here.

V. MEASURED RESULTS
To fully characterize the design, a set of bench-top, in vivo and in vitro experiments were conducted.in vivo recording of cortical neural activity in non-human primate verified the operation of for our long-term aims for medical translation.We did not however have a genetically modified non-human primate expressing channelrhodopsin-2.We therefore demonstrated the efficacy of the LED illumination using in vitro rodent brain tissue.

A. Probe Verification
The proposed probe has been validated using a microcontroller-based test platform providing a USB2 PC interface for control and data visualization.This is based on an ARM Cortex-M4 device (Freescale Kinetis K64F) that configured to be SPI master connecting to the ASIC digital interface.The test configuration is shown in Fig. 13.

B. Bench-Top Testing
The detailed communication handshake during the recording command (see Table I) shown in Fig. 14(a).As it can be observed, the digital controller is running at 12 MHz clock (master clock), the SPI clock set at 6 MHz.It is worth mentioning that the digital controller can also be reliably operated at a lower frequency e.g.300 kHz in reduce power consumption mode.The stimulation operation -SPI communication) followed by µLED being pulsed is shown in Fig. 14(b).As can be observed, with a 12 MHz master clock frequency, the LED ON/OFF frequency can reach up to 50 kHz.The limiting factor is the SPI handshake sequences.
Accurate optical measurements have been done by connecting the neural interface ASIC to the target LED (CREE DA2432) that is placed inside an integrating sphere (P10 from Artifix).The output stimulus was then adjusted by sweeping the DAC range.The measured results are shown in Fig. 15.This shows that an optical stimulus of up to 0.8 mW can be illuminated to the adjacent tissue.

C. Experimental (in vivo/in vitro)
All animal experiments were approved by the local ethics committee at Newcastle University and performed under appropriate UK Home Office licenses in accordance with the Animals (Scientific Procedures) Act 1986.The animal reported here had already been implanted with a chronic electrode array for the purposes of another ongoing study relating to Brain-Machine Interfaces, and the data documented here were taken during a scheduled sedated recording session associated with that study.Therefore no additional licensed procedures were required to collect this data.
The recording sub-system was validated in vivo in a rhesus macaque with moveable microwire electrodes (50 µm tungsten with Teflon insulation) [48] implanted into the motor cortex (M1) and protected with surgical cement and a skull mounted titanium case.
Impedance measured for channel 1,3, and 4 around 200 kΩ at 100 kHz.The recording gain was 300 and sampling frequency was 2.5 kHz.It should be noted that the Channel 2 did not record valid data due to electrode failure (Measured impedance >4 MΩ).We observed large 'K-complex' events that are characteristic of sedation with ketamine.Spectral analysis [Fig.16(b)] suggests that these events are associated with increased power in the delta (14 Hz) and alpha (10 Hz) bands.The continuous band of power at 50 Hz reflects mains interference.One important practical point to note is that the AFE is only accessible via the 10-bit ADC.Therefore, the overall operational frequency is limited between the low cut of frequency of the LNA and the sampling frequency of the ADC.
In order to perform optical stimulation on non-human primate, genetic engineering is required which would have gone beyond the existing ethical remit.Therefore of this part of the work, we utilised a transgenic mouse which had channerlrhodopsin-2 encoded into its core genome.We also decided to use ex-vivo brain slices rather than full in-vivo measurements.In part this was to minimize impact on the animal at this early stage of the research.But it also made the calibration and experimental setup more straightforward.
The in-vitro experiment is done using a 400 µm thick brain slice.This brain slice has been pharmacologically manipulated with bath-application of 4-Aminopyradine, which renders it hyperexcitable.Fig. 17 shows the voltage waveform of neural activity while optical stimulation is applied.
The oscillatory activity that is seen emerging following the optical stimulation represents a seizure-like event that has been elicited by the optical stimulation.These seizure-like events reach up to 2 mV in amplitude and 16 Hz in frequency.Parameters such as the degree of light-sensitivity of the tissue and illumination power of the µLEDs play the key role to sufficiently stimulate the cells.This design provides up to 1.1 mA current to the µLED which produces up to 0.8 mW

VI. CONCLUSION
This paper has presented a neural interface ASIC that connects to a passive optrode to facilitate electrical recording and optical stimulation.The design supports four low noise neural recording channels and six optical stimulation channels.The neural recording and stimulation electronics have been optimized for observing LFPs from electrode, and driving µLEDs sites respectively all positioned along the length of the optrode shaft.The design also includes an integrated digital controller that implements a custom command interpreter and enables communication and system control using an external embedded processor via a SPI bus.After CMOS fabrication of the electronics, the design has undergone additional fabrication stages to meet the requirements for clinical operation.The overall specification of this optrode are listed in Table III and comparison with other existing designs is shown at Table IV.Future work will explore the post-fabrication requirements to implement the ASIC into a fully encapsulated probe as well as long term use in neural tissue.
Reza Ramezani received the M.Sc.degree in communication and signal processing with distinction in 2009 and the Ph.D. degree in microelectronics in 2014 from Newcastle University, Newcastle upon Tyne, U.K. In September 2012, he joined ARM Ltd. design team, which developed the first 64-bit system-on-chip utilizing the big-LITTLE architecture for mobile applications.Since August 2014, he has been with CANOD (http://www.cando.ac.uk) research team, Newcastle University to develop the first in-human bioelectronic treatment for epilepsy.His main research interest include biomedical implantable CMOS for neural interfacing, specially designing electronics for chronic optical stimulation of neurons using advance Optogenetics tools.He is also interested in developing circuit solutions and VLSI implementation for mixed-signal problems in power supply electronics within any energy deficient environments.He was the recipient of the award "Innovator of the Year 2012" from Newcastle University for his research entitled Energy-modulated computing: a new paradigm for designing circuits and systems in energy-constrained environments.

Fig. 1 .
Fig. 1.Proposed optrode concept with passive silicon probe bonded to an active CMOS neural interface ASIC (the focus of this paper).Other examples of optrode implementations can be seen in [4]-[6].Light emission may be via mini or µLED.In our case recording sites are primarily tuned to local field potential recordings.The neural interface ASIC utilizes a standard SPI protocol for communication an external embedded controller.

Fig. 3 .
Fig.3.Timing diagram for the SPI protocol that uses an 8-bit data packet to transmit instructions and receive data.The first byte contains the 4-bit command and a 4-bit coefficient (LED address or clock ratio).The second byte is used to adjust the light intensity of the µLED (8-bit DAC value) or to read the first 8-bits of recorded LFP data.In order to read the remaining bits, an empty command is transmitted (i.e., recorded data requires 12-bits).

Fig. 4 .
Fig.4.State transition diagram for the optrode controller that has been implemented as an 10-state FSM.In addition to the 8 states that are directly selected by the SPI command interpreter, two additional states have been included to avoid error and/or undefined states which may occur due to glitches.The corresponding instructions are listed in TableI.

Fig. 5 .
Fig. 5. Circuit schematic of the analog front end (AFE) neural recording system.Shown are the first two gain stages including: (a) fixed gain (×50) low noise amplifier (LNA); and (b) programmable gain (×1-6) amplifier (PGA).The LNA has been based on a folded-cascode topology to ensure good noise efficiency.The PGA then provides additional gain if required.

Fig. 8 .
Fig.8.Optical output power and efficiency of the utilised CREE mini-LED as a function of input current.It can be observed that the efficiency can reach up to 30%.Output power was measured using an integrating sphere.

Fig. 9 .
Fig. 9. Circuit schematic of the LED control, address decoder, and stimulus generation.Each site driving an LED contains an H-bridge and control logic.A single transconductance amplifier is shared across all 6 output channels.

Fig. 10 .
Fig. 10.H-bridge circuit operation showing: (a) the forward and reverse bias configurations (note that N1 and N2 are 3.3 V transistors); (b) output driver transistor characteristic (overdrive voltage versus drain current) against µLED current (load line).

Fig. 11 .
Fig. 11.Fabricated device microphotograph showing: (a) the neural interface ASIC implemented in 0.35 µm CMOS technology; (b) CMOS-based probe with pads for µLED and electrodes and template for flip-chip bonding of the electronics.The seal ring on the head section is essential to hermetically seal the electronics against any liquid percolation.[46]

Fig. 13 .
Fig. 13.Test configuration showing (a) Microcontroller-based embedded test platform; (b) MATLAB-based GUI for device control and data visualization.

Fig. 14 .
Fig. 14.Measured system response during SPI communication showing: (a) neural recording command issued followed by output data packet; (b) optical stimulation command (set ON followed by set OFF) followed by µLED response.S1 and S2 represent memory cells 1 and 2 switching to '0' and '1' to each SPI command received.

Fig. 15 .
Fig. 15.Measured response of µLED across output range of DAC values showing the range of illumination power.

Fig. 16 .
Fig. 16.Sample neural (LFP) recording from non-human primate (macaque monkey).Data has been captured via SPI after 10-bit ADC conversion at a 2.5 kHz sampling rate.Data in frequency domain is shown only for 0-100 Hz range where the LFP data are expected.

Fig. 17 .
Fig. 17. in vitro neurological recordings (LFP recording) from transgenic mouse (genetically modified to have light-sensitive cells) brain slice while optical stimulation is applied.Observed data contains cell depolarization and neural cell responses.According to this experiment, neural activity up to 3 mV and 33 Hz are recorded in response to 0.8 mW illumination power.
Fig. 16(b) shows the spectrum diagram of channel 1, with most energy spread within 20 Hz and 50 Hz interference.

TABLE I IMPLEMENTED
COMMAND SET WITH CORRESPONDING OPERANDS

TABLE II H
-BRIDGE OPERATION STATES

TABLE III ACHIEVED
SYSTEM SPECIFICATIONS of illumination power.One could increase the driving current if more illumination and better stimulation is required.This, however, increases the power consumption (more heat dissipation).

TABLE IV COMPARISON
WITH STATE-OF-THE-ART