Gao, C;
Ghoreishizadeh, S;
Liu, Y;
Constandinou, T;
(2017)
On-chip ID Generation for Multi-node Implantable Devices using SA-PUF.
In:
Proceedings of the 2017 IEEE International Symposium on Circuits and Systems (ISCAS).
(pp. pp. 678-681).
IEEE: Baltimore, MD, USA.
Preview |
Text
Gao_2017_ISCAS.pdf - Accepted Version Download (1MB) | Preview |
Abstract
This paper presents a 64-bit on-chip identification system featuring low power consumption and randomness compensation for multi-node bio-implantable devices. A sense amplifier based bit-cell is proposed to realize the silicon physical unclonable function, providing a unique value whose probability has a uniform distribution and minimized influence from the temperature and supply variation. The entire system is designed and implemented in a typical 0.35 μm CMOS technology, including an array of 64 bit-cells, readout circuits, and digital controllers for data interfaces. Simulated results show that the proposed bit-cell design achieved a uniformity of 50.24% and a uniqueness of 50.03% for generated IDs. The system achieved an energy consumption of 6.0 pJ per bit with parallel outputs and 17.3 pJ per bit with serial outputs.
| Type: | Proceedings paper |
|---|---|
| Title: | On-chip ID Generation for Multi-node Implantable Devices using SA-PUF |
| Event: | 2017 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Location: | Baltimore, MD |
| Dates: | 28 May 2017 - 31 May 2017 |
| Open access status: | An open access version is available from UCL Discovery |
| DOI: | 10.1109/ISCAS.2017.8050422 |
| Publisher version: | https://doi.org/10.1109/ISCAS.2017.8050422 |
| Language: | English |
| Additional information: | This version is the author accepted manuscript. For information on re-use, please refer to the publisher’s terms and conditions. |
| Keywords: | MOS devices, Layout, Logic gates, Power demand, System-on-chip, Implants, Temperature distribution |
| UCL classification: | UCL UCL > Provost and Vice Provost Offices UCL > Provost and Vice Provost Offices > UCL BEAMS UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng |
| URI: | https://discovery.ucl.ac.uk/id/eprint/10063288 |
Archive Staff Only
 |
View Item |
