%D 2024
%P 1-5
%B Proceedings of the  13rd Sensor Array and Multichannel Signal Processing Workshop (SAM) 2024 IEEE
%T CI-Based QoS-Constrained Transmit Signal Design for DFRC Systems with One-Bit DACs
%A Z Wu
%A WK Chen
%A YF Liu
%A C Masouros
%O This version is the author accepted manuscript. For information on re-use, please refer to the publisher's terms and conditions.
%C Corvallis, OR, USA
%X In this paper, we investigate the transmit signal de-sign problem for a dual-functional radar-communication (DFRC) system equipped with one-bit digital-to-analog converters (DACs). Specifically, the one-bit DFRC waveform is designed to minimize the difference between the transmitted beampattern and a desired one, while ensuring constructive interference (CI)-based QoS constraints for communication users. The formulated problem is a discrete optimization problem with a nonconvex objective function and many linear constraints. To solve it, we first propose a penalty model to transform the discrete problem into a continuous one. Then, we propose an inexact augmented Lagrangian method (ALM) framework to solve the penalty model. In particular, the ALM subproblem at each iteration is solved by a custom-designed block successive upper-bound minimization (BSUM) algorithm, which admits closed-form updates and thus makes the proposed approach computationally efficient. Simulation results verify the superiority of the proposed approach over the existing ones in both the radar and communication performance.
%J Proceedings of the IEEE Sensor Array and Multichannel Signal Processing Workshop
%L discovery10197223
%I Institute of Electrical and Electronics Engineers (IEEE)