TY  - GEN
PB  - IEEE
TI  - Design of a Power Management Circuit for an Opto-Electro Stimulator
Y1  - 2021/06/25/
A1  - Almarri, N
A1  - Jiang, D
A1  - Demosthenous, A
N1  - This version is the author accepted manuscript. For information on re-use, please refer to the publisher's terms and conditions.
UR  - https://doi.org/10.1109/NEWCAS50681.2021.9462777
N2  - This paper presents the design of an integrated power management circuit for use in an implantable opto-electro stimulator. It features an active rectifier with pulse width modulation (PWM) regulation to generate a 3.3 V regulated output, and a 3-stage high voltage charge pump (CP) that generates a 12 V output from a 3.3 V input with a 20 MHz, two-phase non-overlapping clock generator. The circuits were designed in a 0.18-痠 CMOS technology requiring a chip area of 0.048 mm 2 . Simulation results show that the regulating rectifier has a voltage conversion efficiency of 94.3% and 92.8% with an ac input magnitude of 3.5 V and 3.6 V, respectively. The peak power transfer efficiency of the regulated 3.3V output voltage is 70.7% with a maximum output power of 30.3 mW. The CP with an overall on-chip capacitance is 60 pF.
ID  - discovery10133247
AV  - public
ER  -