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OXIDATION OF SILICON - THE VLSI GATE DIELECTRIC

SOFIELD, CJ; STONEHAM, AM; (1995) OXIDATION OF SILICON - THE VLSI GATE DIELECTRIC. SEMICOND SCI TECH , 10 (3) 215 - 244. 10.1088/0268-1242/10/3/001. Green open access

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Abstract

Silicon dominates the semiconductor industry for good reasons. One factor is the stable, easily formed, insulating oxide, which aids high performance and allows practical processing. How well can these virtues survive as new demands are made on integrity, on smallness of feature sizes and other dimensions, and on constraints on processing and manufacturing methods? These demands make it critical to identify, quantify and predict the key controlling growth and defect processes on an atomic scale.The combination of theory and novel experiments (isotope methods, electronic noise, spin resonance, pulsed laser atom probes and other desorption methods, and especially scanning tunnelling or atomic force microscopies) provide tools whose impact on models is just being appreciated. We discuss the current unified model for silicon oxidation, which goes beyond the traditional descriptions of kinetic and ellipsometric data by explicitly addressing the issues raised in isotope experiments. The framework is still the Deal-Grove model, which provides a phenomenology to describe the major regimes of behaviour, and gives a base from which the substantial deviations can be characterized. In this model, growth is limited by diffusion and interfacial reactions operating in series. The deviations from Deal-Grove are most significant for just those first tens of atomic layers of oxide which are critical for the ultra-thin oxide layers now demanded. Several features emerge as important. First is the role of stress and stress relaxation. Second is the nature of the oxide closest to the Si, both its defects and its differences from the amorphous stoichiometric oxide further out, whether in composition, in network topology, or otherwise. Thirdly, we must consider the charge states of both fixed and mobile species. In thin films with very different dielectric constants, image terms can be important; these terms affect interpretation of spectroscopies, the injection of oxidant species and relative defect stabilities. This has added importance now that P-b concentrations have been correlated with interfacial stress. This raises further issues about the perfection of the oxide random network and the incorporation of interstitial species like molecular oxygen.Finally, the roles of contamination, particles, metals, hydrocarbons etc are important, as is interface roughness. These features depend on pre-gate oxide cleaning and define the Si surface that is to be oxidized which may have an influence on the features listed above.

Type: Article
Title: OXIDATION OF SILICON - THE VLSI GATE DIELECTRIC
Open access status: An open access version is available from UCL Discovery
DOI: 10.1088/0268-1242/10/3/001
Publisher version: http://dx.doi.org/10.1088/0268-1242/10/3/001
Language: English
Additional information: Text made available to UCL Discovery by kind permission of IOP Publishing, 2012
Keywords: SCANNING TUNNELING MICROSCOPY, GROWTH-RATE ENHANCEMENT, SELF-TRAPPED EXCITON, X-RAY-DIFFRACTION, THIN OXIDE-FILMS, THERMAL-OXIDATION, SI-SIO2 INTERFACE, SURFACE-ROUGHNESS, SIO2/SI INTERFACE, DIOXIDE FILMS
UCL classification: UCL > Provost and Vice Provost Offices
UCL > Provost and Vice Provost Offices > UCL BEAMS
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Maths and Physical Sciences
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Maths and Physical Sciences > London Centre for Nanotechnology
URI: http://discovery.ucl.ac.uk/id/eprint/80726
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