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A SERIAL-UPDATE VLSI ARCHITECTURE FOR THE LEARNING PROBABILISTIC RAM NEURON

CLARKSON, T; NG, T; GORSE, D; TAYLOR, J; (1991) A SERIAL-UPDATE VLSI ARCHITECTURE FOR THE LEARNING PROBABILISTIC RAM NEURON. In: KOHONEN, T and MAKISARA, K and SIMULA, O and KANGAS, J, (eds.) ARTIFICIAL NEURAL NETWORKS, VOLS 1 AND 2. (pp. 1573 - 1576). ELSEVIER SCIENCE PUBL B V

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Type:Proceedings paper
Title:A SERIAL-UPDATE VLSI ARCHITECTURE FOR THE LEARNING PROBABILISTIC RAM NEURON
Event:INTERNATIONAL CONF ON ARTIFICIAL NEURAL NETWORKS ( ICANN-91 )
Location:ESPOO, FINLAND
Dates:1991-06-24 - 1991-06-28
ISBN:0-444-89178-1
UCL classification:UCL > School of BEAMS > Faculty of Engineering Science > Computer Science

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