UCL logo

UCL Discovery

UCL home » Library Services » Electronic resources » UCL Discovery

An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors

Liu, X; Demosthenous, A; Donaldson, N; (2008) An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors. IEEE T BIOMED CIRC S , 2 (3) 231 - 244. 10.1109/TBCAS.2008.2003199.

Full text not available from this repository.

Abstract

We present a neural stimulator chip with an output stage (electrode driving circuit) that is fail-safe under single-fault conditions without the need for off-chip blocking-capacitors. To miniaturize the stimulator output stage two novel techniques are introduced. The first technique is a new current generator circuit reducing to a single step the translation of the digital input bits into the stimulus current, thus minimizing silicon area and power consumption compared to previous works. The current generator uses voltage-controlled resistors implemented by MOS transistors in the deep triode region. The second technique is a new stimulator output stage circuit with blocking-capacitor safety protection using a high-frequency current-switching (HFCS) technique. Unlike conventional stimulator output stage circuits for implantable functional electrical stimulation (FES) systems which require blocking-capacitors in the microfarad range, our proposed approach allows capacitance reduction to the picofarad range, thus the blocking-capacitors can be integrated on-chip. The prototype four-channel neural stimulator chip was fabricated in XFAB's 1-mu m silicon-on-insulator CMOS technology and can operate from a power supply between 5-18 V. The stimulus current is generated by active charging and passive discharging. We obtained recordings of action potentials and a strength-duration curve from the sciatic nerve of a frog with the stimulator chip which demonstrate the HFCS technique. The average power consumption for a typical 1-mA 20-Hz single-channel stimulation using a book electrode, is 200 mu W from a 6 V power supply. The silicon area occupation is 0.38 mm(2) per channel.

Type: Article
Title: An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors
DOI: 10.1109/TBCAS.2008.2003199
Keywords: Action potential, biomedical circuits, blocking-capacitor, capacitance reduction, current generator, fail-safe, functional electrical stimulation (FES), implanted device, neural stimulator, RETINAL PROSTHETIC DEVICE, ELECTRICAL-STIMULATION, NEUROLOGICAL PROSTHESIS, SELECTIVE STIMULATION, COCHLEAR IMPLANTS, NERVE ROOTS, PH CHANGES, IN-VIVO, SYSTEM, ARCHITECTURE
UCL classification: UCL > Provost and Vice Provost Offices
UCL > Provost and Vice Provost Offices > UCL BEAMS
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Electronic and Electrical Eng
UCL > Provost and Vice Provost Offices > UCL BEAMS > Faculty of Engineering Science > Dept of Med Phys and Biomedical Eng
URI: http://discovery.ucl.ac.uk/id/eprint/155844
Downloads since deposit
0Downloads
Download activity - last month
Download activity - last 12 months
Downloads by country - last 12 months

Archive Staff Only

View Item View Item