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Introducing the FPGA-based Hardware Architecture of Systemic Computation (HAoS)

Sakellariou, C; Bentley, PJ; (2012) Introducing the FPGA-based Hardware Architecture of Systemic Computation (HAoS). In: (pp. pp. 179-190).

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Abstract

This paper presents HAoS, the first Hardware Architecture of the bio-inspired computational paradigm known as Systemic Computation (SC). SC was designed to support the modelling of biological processes inherently by defining a massively parallel non-conventional computer architecture and a model of natural behaviour. In this work we describe a novel custom digital design, which addresses the SC architecture parallelism requirement by exploiting the inbuilt parallelism of a Field Programmable Gate Array (FPGA) and by using the highly efficient matching capability of a Ternary Content Addressable Memory (TCAM). Basic processing capabilities are embedded in HAoS, in order to minimize time-demanding data transfers, while the optional use of a CPU provides high-level processing support. We demonstrate a functional simulation-verified prototype, which takes into consideration programmability and scalability. Analysis shows that the proposed architecture provides an effective solution in terms of efficiency versus flexibility trade-off and can potentially outperform prior implementations. © 2012 Springer-Verlag Berlin Heidelberg.

Type: Proceedings paper
Title: Introducing the FPGA-based Hardware Architecture of Systemic Computation (HAoS)
ISBN-13: 9783642259289
DOI: 10.1007/978-3-642-25929-6_17
URI: http://discovery.ucl.ac.uk/id/eprint/1334564
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